Digital Subsampling Phase Lock Techniques for Frequency Synthesis and Polar Transmission by Nereo Markulic & Kuba Raczkowski & Jan Craninckx & Piet Wambacq

Digital Subsampling Phase Lock Techniques for Frequency Synthesis and Polar Transmission by Nereo Markulic & Kuba Raczkowski & Jan Craninckx & Piet Wambacq

Author:Nereo Markulic & Kuba Raczkowski & Jan Craninckx & Piet Wambacq
Language: eng
Format: epub
ISBN: 9783030109585
Publisher: Springer International Publishing


3.2.3 The Random-Jump for DTC Nonlinearity Randomization

Any nonlinearity in the phase-error comparison path of a PLL will also induce fractional spurs and noise folding. In the context of analog PLLs, this problem typically originates from a nonlinear charge pump [Meninger06, Lacaita07]. Similarly, in classical digital PLLs where an analog PFD is replaced by a TDC, the TDC causes similar issues [Borremans10, Temporiti10, Staszewski05].

In DTC-based PLLs, this problem arises due to the nonlinearity of the DTC, since the delay through the DTC affects the phase-error detection. Intuitively, if the DTC has a pronounced integral nonlinearity (INL), by application of a periodic signal at its input (Fig. 3.5c) during fractional synthesis, the DTC will create periodical errors. The periodicity is related to the fractional multiplication number and results in spurs at the fractional residue frequency and its harmonics [Levantino14]. Again, the Random-Jump mechanism described earlier helps with spurious tone reduction by removing periodicity from the DTC INL-induced errors. For example, with [0:4] jump range, there are five different DTC codes and five different INL errors at five different zero-crossings which can be used for the same residual phase compensation. The cost of randomization is now, unfortunately, a higher noise floor, i.e., the spur energy is spread, not removed. Nevertheless, the reduction of spurs can be of greater importance than increased noise if the in-band noise is not a limitation, as is the case for many low-power medium performance PLLs.

Figure 3.6 shows the DTC error-induced phase noise (in-band, without PLL filtering) for a fractional 10-GHz VCO output in a simulation with a nonlinear DTC (2 LSB INL), both with and without randomization. Clearly, to correct the spurs without raising the phase noise floor, the spurs themselves must be reduced, meaning that better DTC linearity is required.



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